10M02SCU169C8G Programmable IC Chip Field Gate Array (FPGA) IC 169-LFBGA

10M02SCU169C8G Programmable IC Chip
Field Programmable Gate Array (FPGA) IC 130 110592 2000 Package169-LFBGA

Viw range: 0 V ≤ VIN ≤ 1.85 V.
Rl range: 90 S RL 110 .
Low Vop setting is only supported for RSDS standard.
LVPECL input standard is only supported at clock input. Output standard is not supported.
The 1.8 V LVDS buffers are suppoted as inputs on all high-speed I/0 banks but as outputs only on the bottom banks. The low-speedand high-speed DDR3 1/0 banks do not support 1.8 V LVDS. The 1.8 V LVDS 1/0 standard is supported in industrial- and commercialgrade Intel MAX 10 dual supply devices except in packages V36 and V81.
No fixed Vn , Vop , and Vos specifications for Bus LVDS (BLVDS). They are dependent on the system topology.Mini-lyDS,RSDS. and Point-to-Point Differential Sianalina (PPDS) standards are only supported at the output pins for intel MAX 10devices.

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