AD622ANZ Integrated Circuit Chip Low Cost Instrumentation Amplifier

Low Cost Instrumentation Amplifier AD622

FEATURES

• Easy to use
• Low cost solution
• Higher performance than two or three op amp design
• Unity gain with no external resistor
• Optional gains with one external resistor (Gain range: 2 to 1000)
• Wide power supply range: ±2.6 V to ±15 V
• Available in 8-lead PDIP and 8-lead SOIC_N packages
• Low power, 1.5 mA maximum supply current
• DC performance
  • 0.15% gain accuracy: G = 1
  • 125 μV maximum input offset voltage
  • 1.0 μV/°C maximum input offset drift
  • 5 nA maximum input bias current
  • 66 dB minimum common-mode rejection ratio: G = 1
• Noise
  • 12 nV/√Hz @ 1 kHz input voltage noise
  • 0.60 μV p-p noise: 0.1 Hz to 10 Hz, G = 10
• AC characteristics
  • 800 kHz bandwidth: G = 10
  • 10 μs settling time to 0.1% @ G = 1 to 100
  • 1.2 V/μs slew rate

APPLICATIONS

• Transducer interface
• Low cost thermocouple amplifier
• Industrial process controls
• Difference amplifier
• Low cost data acquisition

GENERAL DESCRIPTION

The AD622 is a low cost, moderately accurate instrumentation amplifier that requires only one external resistor to set any gain between 2 and 1000. For a gain of 1, no external resistor is required. The AD622 is a complete difference or subtracter amplifier system that also provides superior linearity and common-mode rejection by incorporating precision lasertrimmed resistors.

The AD622 replaces low cost, discrete, two or three op amp instrumentation amplifier designs and offers good commonmode rejection, superior linearity, temperature stability, reliability, and board area consumption. The low cost of the AD622 eliminates the need to design discrete instrumentation amplifiers to meet stringent cost targets. While providing a lower cost solution, it also provides performance and space improvements.

ABSOLUTE MAXIMUM RATINGS

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

PIN CONFIGURATION

Figure 1. 8-Lead PDIP and 8-Lead SOIC_N (N and R Suffixes)

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